The present invention relates to a network interface circuit apparatus and method.
Local Area Networks (LANs), also referred to as Local Terminal Networks, are used in a number of different applications. Many offices have terminals interconnected via a LAN to allow the transfer of files between terminals on the network, the transfer of electronic mail, the sharing of common resources such as memory devices, printers, modems, etc., the administration of terminals by a network administrator, accessing of common data bases, etc. Individual LANs are often connected to central host computer systems and/or additional LANs.
Numerous LAN standards have been developed to allow equipment from different vendors to be interconnected and communicate via the LAN. Each terminal on the network requires a transceiver function to allow transmission of information from the terminal to the network and receipt of information at the terminal from the network. One example of a LAN standard is the EIA RS-485 standard which utilizes an RS-485 transceiver. Two of the most common hardware implementations of RS-485 networks are to utilize a dedicated processor to control the RS-485 transceiver or to use the terminal itself to control the RS-485 transceiver.
A dedicated processor with read only memory (ROM), random access memory (RAM), and other logic provides a buffer between the terminal and the RS-485 transceiver circuit. The dedicated processor constantly watches the traffic on the network to know when the network is available for transmission of data on the network. When the dedicated processor receives blocks of data from the terminal, it will package the data with the appropriate protocol codes and append a check sum. It will then wait for the network to be available. When the dedicated processor senses that the network is available, the processor will transmit the data onto the network and wait for receipt of an acknowledgement (ACK) back from the receiving terminal. The dedicated processor will handle this transmission and any necessary retransmissions without requiring any further controller input from the terminal.
In this approach, each receiving terminal on the network will also have a dedicated processor that continually monitors the network line and waits for a message with its terminal address. Each processor on the network will have a unique address. The dedicated processor of the receiving terminal checks the received message for accuracy by checking the check sum or LRC and then responds with an acknowledgement (ACK) if the data is accurately received or a non-acknowledgement (NAK) if the data is not accurately received. Only when data is accurately received, does the dedicated processor send the data on to its associated terminal. The advantage of this approach is that there is very little network processing overhead required of the terminal since most of the network interface activity is carried out by the dedicated processor. The disadvantage of this approach is its relatively high cost. The dedicated processor section of the terminal is a significant cost as compared to the rest of the terminal electronics.
A second common hardware implementation of RS-485 networks is where the terminal processor controls the RS-485 transceiver. In this approach, the terminal's own processor handles all control of its interface to the network. The terminal must know when the network is available by inputting all data from the network at all times or at least try to input data when it has data to transmit. Once the terminal has verified that there is no traffic on the network, it must pause for a set period of time to ensure that the last transmitting terminal is off the line. It must then set a status bit to turn on the driver portion of its RS-485 transceiver. The RS-485 transceiver will then begin transmitting data. When the terminal has transmitted all of its data, it must then pause long enough for all the bits of the last byte to be shifted out the shift register before turning its RS-485 transceiver off.
The advantage of this approach is that it is very low cost since there is very little hardware required. The disadvantage of this approach is due to the terminal processor overhead required. The terminal processor must constantly input data from the network line to know when it is available and must implement delay timers to implement the delays previously described.
The present invention solves these and other problems associated with local area networks.